Every quantum processor spec sheet is a sales document. The numbers are real, but the selection is editorial: a vendor chooses the qubit, the calibration run, and the benchmark that flatter the machine most. That isn't a scandal — it's marketing. Your job is to read the sheet the way an engineer would, turning each claim into a question. Four numbers decide whether a device can run your algorithm: connectivity, coherence, two-qubit gate fidelity, and readout error. Everything else is context.
Qubit Count Is the Headline, Not the Answer
Qubit count is the easiest number to print and the least useful alone. Ask two questions before you get excited.
First, how many of those qubits pass calibration at the same time? A 100-qubit device where 60 sit inside spec after the latest tune-up behaves like a 60-qubit device for your circuit. The rest are ballast. Vendors rarely volunteer this, but they will usually answer if you ask for the count of qubits meeting a stated fidelity threshold simultaneously.
Second, how are the qubits wired? A lattice with nearest-neighbor coupling forces your compiler to insert SWAP operations to move information between distant qubits. Every SWAP costs time and fidelity. An all-to-all architecture or a richer topology can cut that overhead dramatically, which is why a smaller, better-connected device sometimes outperforms a larger one on the same problem.
Also keep physical and logical qubits strictly separate. Error-corrected logical qubits consume many physical ones. A spec sheet that blurs the two is telling you something about its author.
Coherence: T1, T2, and the Asterisk Attached to Both
T1 measures energy relaxation — how long an excited qubit stays excited. T2 measures dephasing — how long it keeps a stable phase relationship. Superconducting transmons typically report these in microseconds; trapped ions in seconds. But slower gates come with the longer coherence, so don't compare raw times across modalities. Compare the ratio instead: how many gates of a given fidelity fit inside the coherence window? That number, not T1 by itself, tells you how deep your circuit can go.
Then read the fine print. Is the figure a median across the chip, a worst case, or the single best qubit in the lab? A median with a wide spread means your algorithm lands on whichever qubit the scheduler hands you. Ask whether coherence was measured with neighbors idle or with the whole chip operating, because idle neighbors and active neighbors are different devices.
Readout fidelity is the quiet number
Readout error of two to five percent looks small next to gate errors, but you pay it on every measurement, and repeated measurements compound it. Ask for single-shot readout fidelity per qubit and for the state-preparation-and-measurement error, often reported together as SPAM. If a vendor quotes only gate fidelity and stays quiet about readout, push harder. Good readout is unglamorous and frequently the difference between a clean result and a histogram you can't interpret.
Gate Fidelity: The Number That Decides What You Can Run
Single-qubit gates are usually excellent, often above 99.9 percent. Two-qubit gates are the bottleneck, and they are the number you should care about. A device with 99.5 percent two-qubit fidelity and one with 99.9 percent look similar on a slide and behave very differently in practice. Run the arithmetic for your own circuit: at 0.5 percent error per two-qubit gate, a hundred-gate-deep circuit succeeds about 60 percent of the time; at 0.1 percent error, roughly 90 percent. Depth turns small error rates into large failure rates.
Ask how fidelity was measured. Randomized benchmarking gives a solid average, and interleaved randomized benchmarking isolates specific gate pairs. Cross-entropy benchmarking captures the whole circuit, including crosstalk and compilation. Best-case claims for a hand-picked pair of qubits are worth knowing and not worth planning around.
Benchmarks: Quantum Volume, CLOPS, XEB
Quantum Volume builds square circuits of equal width and depth and measures how often the output is heavy — biased toward the more probable outcomes. It captures gate fidelity, connectivity, crosstalk, readout, and compiler quality in one figure, which makes it broad and easy to game with a flattering circuit family. CLOPS measures throughput: how many circuit layers the system executes per second, including control overhead. It says nothing about quality, so a fast, noisy machine can post a large CLOPS number. XEB estimates circuit fidelity against a classical simulation, and it is sensitive to the exact circuit family used.
None of these is universal. Whenever you see a benchmark headline, ask who chose the benchmark, what circuit family it used, and whether it resembles anything you plan to run.
What Spec Sheets Leave Out
- Calibration drift. How often is the chip retuned, and can your job be interrupted mid-run?
- Crosstalk. Does two-qubit fidelity hold when neighboring pairs fire simultaneously?
- Availability. Real uptime, queue depth, and scheduling latency on cloud access.
- Compiler quality. The same hardware performs differently depending on routing and transpilation.
- The physical bill. Cryogenics, control electronics, wiring, power, and the engineers who keep it running.
- Roadmap language. Separate what has shipped from what is orderable and what was demonstrated once in a lab.
A Checklist Before You Commit
- Request median and worst-case figures for T1, T2, two-qubit fidelity, and readout — not best-case.
- Ask for the benchmark methodology, and reproduce it yourself if access allows.
- Estimate your circuit's two-qubit gate count after routing, then compute (1 − e) raised to your depth.
- Ask how the device behaves under simultaneous operation, not one gate at a time.
- Run a pilot on the smallest meaningful version of your own problem.
- Price the whole engagement: access time, control stack, and engineering hours.
Your Workload Is the Only Benchmark That Counts
Published benchmarks are other people's circuits. A machine that wins a volume test may be mediocre on the sparse, shallow circuits your team runs, and the reverse is just as common. Take the pilot seriously, compare the histograms, and talk to support before you buy. A vendor who welcomes your test is selling a product; one who deflects it is selling a slide.
Photo: Joachim Schnürle / Pexels
